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Requirements and Specifications
We received a specifications document from our client giving details about what was required in the finished project. The entire document can be downloaded here.
Below is a concise summary of what that document contained.
- General Requirement
- To develop a digital receiver using an FPGA, with the main focus on developing topology and working VHDL/Verilog code to meet the specifications
- Interface Requirements
- The FPGA must be interfaced with an ADC converter for input, and a DAC converter for output.
- The FPGA must also be interfaced to the user for channel selection
- Input Requirements
- Input channel frequency: 75mhz
- External receiver bandwidth: 200khz
- Digital signal processing requirements
- Handle two different channel spacings
- 25 khz channels
- -6 dB maximum @ +/- 10 khz
- -40 dB minimum @ +/- 17 khz
- -60 dB minimum @ +/- 22 khz
- 8.33 khz channels
- -6 dB maximum @ +/- 2.78 khz
- -60 dB minimum @ +/- 7.37 khz
- Audio leveling
- The output should include automatic level control for less than 3 dB audio output variation
- Dynamic range
- 100 dB, of which 40 dB should be accomplished in the FPGA
- Modulation
- Choice of amplitude and/or frequency modulation
- Other Requirements
- Code Language
- Choice of Verilog or VHDL--Verilog is preferred
- Operating temperature range
- -30 degrees to 85 degrees Celsius
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