Detailed Design
The design of our system for testing communication protocols started with general ideas we
received from our client Cobham Aerospace. We as a team, asked for information surrounding our
project including all requirements and specifications that we would need to meet. We also received
advice from our technical adviser from NAU on testing communications and suggestions on how to go
about the actual testing.
Our design that we constructed consisted of an FPGA (Field Programmable Gate Array) board
with onboard team written software that simulates a communication protocol sending and receiving
bytes of information displayed to a PC while external noise of any kind is injected from a noise board
into the system to create error for testing. The bit error rate in the tested protocol is displayed to a PC
based graphical user interface (GUI) which also was written by the team and also has simulation setup
controls for the testing.
Milestones
- Develop functional code for the FPGA. [Completed: In Progress]
- Design GUI shell. [Completed: March 12, 2013]
Hardware
- Xilinx SP605 development board with Spartan VI FPGA.
- Noise board to allow for noise injection
Software
- Xilinx ISE, used to write the Verilog code to the FPGA board.
- Visual Studios, used to write the C# code needed to implement the GUI.
Tradeoffs
- Ended up using an FPGA board with different i/o ports than the board we originally planned on using.
Testing
- We have tested our setup by establishing the communication between the computer and GUI. This included having the GUI set up the necessary com ports and sending commands to the FPGA board.
Problems
- We had to push back several parts of the project due to issues with obtaining the FPGA.
- The Verilog programming language was initially difficult to work with, causing some delays in the development of the code.